Introduction — Electronic Devices using Low-Dimensional van der Waals Materials and Their Heterojunctions

Low-dimensional materials are materials in which the constituent atoms/molecules are strongly bonded (usually by covalent bonds) along some dimensions while weakly (van der Waals bonds) bonded along others. This leads to two possibilities - two-dimensional and one-dimensional materials. In two-dimensional materials, strong bonding is along a 2D plane, while along the third dimension, the bonding is weak. In one-dimensional materials, strong bonding is along a 1D line, while the bonding is weak along the other two dimensions.

The discovery of extremely thin (single layer of carbon atoms) yet stable 2D layers like graphene¹ and ultra-thin single-wall carbon nanotubes² has led numerous researchers across the globe to dive into the exciting world of low-dimensional materials to address problems of technological importance as well as fundamental understanding of nature.

Promise of low-dimensional materials in transistor scaling

Transistors are fundamental building blocks of all modern computational systems. Therefore, the efficiency of a transistor, in terms of energy and speed, will have a major impact on the overall system’s performance. The number of transistors in a computational system has grown remarkably since the 1960s, guided by Moore’s law³. The transistor dimensions have consistently reduced, making it possible to pack more transistors into a single chip with the same area⁴. Interestingly, this has consistently led computation systems to perform better for lower costs over the past half-century. In a very short time, this exponential growth greatly impacted human society’s social, economic, and cultural aspects. Silicon, a three-dimensional material, has been the material for transistor channels. However, as the silicon transistors enter the sub-10nm technology node, the technological challenges are also ever-increasing. To overcome these challenges, novel device architectures and materials to make transistors are being continuously explored by the global research community.

Transistors are switches in which the current between two terminals (source and drain) is controlled by a third terminal (gate). The electrostatics of the transistor channel mainly governs the transistor’s properties.

where \(\phi (x)\) is the electrostatic potential along the channel of the device, while \(\lambda=\sqrt{\frac{t_bt_{ox}\epsilon_b}{\epsilon_{ox}}}\) is called the characteristic length of the transistor. A smaller characteristic length allows for a smaller transistor without affecting the performance. Here \(t_b\), \(\epsilon_b\), \(t_{ox}\), and \(\epsilon_{ox}\) are the thickness and dielectric constants of the semiconducting channel and the gate dielectric, respectively. A significant effort has been put into improving the gate stack by reducing \(t_{ox}\) and increasing \(\epsilon_{ox}\). At the same time, efforts to reduce the thickness of the transistor channel, \(t_b\), have also been significant. However, the effort to reduce \(t_b\) has always been met with challenges like increased surface roughness, device variability, and poor interfaces due to dangling bonds. These effects are most significantly visible in the degradation of field-effect mobility of the transistors with decreasing \(t_b\) due to an increase in carrier scattering.

Here is where low-dimensional materials have come to the rescue. Due to their weak van der Waals bonding along some dimensions, they can be arbitrarily thinned down along those dimensions without significantly degrading the channel and interface properties⁵. A two-dimensional material can be scaled down to a monolayer without degrading its properties^1,6. Similarly, a one-dimensional material can be scaled to a single chain of atoms/molecules.

However, low-dimensional semiconductors come with a different set of challenges, which the research community is trying to address. Foremost among these is the lack of proper contact with the material. Inefficient metal-semiconductor contacts lead to large contact resistance, significantly degrading the transistor performance⁷. Also, the lack of proper doping techniques and the dependence on intrinsic doping of the material often leads to significant device-to-device variations. The lack of doping has also made implementing complementary logic (n-type and p-type) challenging. Finally, the wafer-scale fabrication of integrated circuits also remains a challenge.

Low-dimensional materials for optoelectronics and photonics

Low-dimensional materials have many interesting properties that can be utilized for various optoelectronic^8,9 applications like photodetectors^10,11, solar cells^12,13, light-emitting devices^14,15, single photon emitters¹⁶ and single photon detectors¹⁷. The availability of a large library of these materials with a wide range of bandgaps has made them suitable for photodetectors for a wide spectrum of electromagnetic radiation. The thickness-dependent tunability of the bandgap has further added to their advantage^18,19. Semimetals like graphene have been used for ultrafast broadband photoresponse²⁰. Many low-dimensional materials (partly due to strong quantum confinement) show interesting properties from quasiparticles like excitons, trions, etc²¹.

Another major advantage of low-dimensional materials in optoelectronics arises from the ability to form heterojunctions. Heterojunctions with a wide variety of properties can be fabricated for efficient carrier generation and collection in the case of photodetectors and carrier recombination and light emission in the case of light-emitting devices. The gain-bandwidth tradeoff has been one of the major limitations of optoelectronics using low-dimensional materials²². This comes from traps at the semiconductor-substrate interfaces²³ and the lack of integration with sensing and detection circuits and systems.

Motivation

In the previous sections, we have discussed the opportunities and challenges for low-dimensional material-based devices. In this thesis, we try to address some of these challenges. The main challenge for transistor applications is getting high-performance devices at lower energies. This often involves mitigating contact resistance. For optoelectronic devices, the challenge has been to get stable devices to detect even low-energy electromagnetic radiation with high responsivity and good speed. These challenges have been the main motivational guiding forces behind this work.

Thesis Organizatiom

Chapter 2: Here, we explore gate-all-around junctionless transistor architecture, a suitable structure for sub-5nm technology node due to its excellent electrostatics, using the tellurium nanowires. Further, we use h-BN, a two-dimensional insulator, as the gate dielectric. The combination of the unique material properties and the device architecture helped us fabricate p-type transistors with field-effect mobility of 570 \(\mathrm{cm^2/V\cdot s}\), a high drive current of 216 mA/mm and an on-off ratio of \(\mathrm{2\times 10^4}\).

Chapter 3: Using partially overlapping gates, we present an electrically defined self-aligned \(\mathrm{SnSe_2}\)/\(\mathrm{WSe_2}\) heterostructure device. The device operates as n-type and p-type transistors by applying appropriate gate biases. The device can also be used as a test platform to discern the properties of the heterojunction without confounding the effects of contact resistance. This device can be operated as a tunnel transistor as well. At room temperature, the device exhibits a subthreshold swing of less than 60 mV/dec.

Chapter 4: In this chapter, we present a vertically integrated double-channel transistor based on ultrathin 2D material to meet these challenges. The device structure effectively increases the contact area, thus reducing the contact resistance by about a factor of two without compromising the device footprint or electrostatic integrity. The proposed device structure achieves a high drive current of over 400 mA/mm.

Chapter 5: Here, we present infra-red detection using stable wide-bandgap material heterostructure and electron transition from one material’s conduction band to the other’s conduction band. We propose multiple device architectures to understand the mechanism of the device operation from their bias-dependent photo response and simple physical models. The device exhibits the responsivity of 40 mA/W when excited with 1550 nm wavelength IR radiation. The device operates and exhibits a nearly flat response up to 1800 nm, and a signal above the noise floor could be observed up to 30 kHz.

Chapter 6 concludes the findings of this work and discusses the future scope.

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